Low Latency System

A curated collection of resources for building low-latency systems, with a focus on financial trading. Every reference below carries a summary badge linking to a plain-language summary of that reference, and a level tag — beginner intermediate advanced — so you can decide what to read before you click.

New here? Read The Complete Guide — a single page that organizes this whole topic from beginner to expert: what latency is, where the nanoseconds go, and which techniques buy what.

Content fully refreshed in July 2026. The research behind the update — every link checked, dead links replaced, new state-of-the-art references added — is documented in the research notes.

Start Here

Linux OS Tuning

Server Hardware & CPUs

Since this site’s last update, the landscape changed: HPE retired its overclocked “Trade and Match” servers, and boutique vendors (Blackcore, Hypertec CIARA) now own that niche. On the mainstream side, AMD EPYC 9005 F-series (e.g. 9575F), EPYC 4004/4005 X3D parts with 3D V-Cache, and Intel Xeon 6 with Latency Optimized Mode are the current choices. Single-socket is the settled architecture for the latency path, and core-to-core latency is now a first-class CPU selection metric.

Networking, NICs & Kernel Bypass

The vendor map was redrawn: Solarflare → Xilinx → AMD (X4-series NICs, Oct 2025), Mellanox → NVIDIA (VMA replaced by XLIO), Exablaze → Cisco (which then exited the ULL switch business in 2023, leaving Arista 7130 as the de facto layer-1 platform).

Understand the kernel path first

Kernel bypass stacks

NICs

Switches

RDMA & InfiniBand

FPGA & Hardware Acceleration

Time Synchronization & Timestamping

Measurement, Benchmarks & Jitter Detection

Programming Languages & Code

C++

Concurrency & lock-free

Java

Rust

Communities & protocols

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